[CCoE Notice] (10:30 am US Central Time) Zoom Webinar: Next-Generation Microelectronic Packaging: Opportunities and Challenges – A Reliability Perspective * 10:30 am, Friday, Nov. 20 * Suresh K. Sitaraman * Georgia Institute of Technology *

Knudsen, Rachel W riward at Central.UH.EDU
Wed Nov 18 09:46:47 CST 2020


                                                                             ***** Seminar *****

Department of Electrical and Computer Engineering

Materials Engineering Program

Center for Integrated Bio and Nano Systems

  10:30 a.m., November 20, 2020

Join Zoom Meeting

https://urldefense.com/v3/__https://zoom.us/j/845619943?pwd=QlZvYUV6M2dxNDkvNWxBd3F2YzdJZz09__;!!LkSTlj0I!RXh3aE0VGDUfpXdwkPoqs5H8a27w1OuFVMCyJFv-1KwC8cIsCeRCtx8AUiG5257hsZY$ <https://urldefense.com/v3/__https://zoom.us/j/845619943?pwd=QlZvYUV6M2dxNDkvNWxBd3F2YzdJZz09__;!!LkSTlj0I!RY36v8rc0HmWFLiTTBHvwLA0IazEOlQxdQZC1QwuRSdYLO0ZgFA27Y6PryVryUiq6I-G0w$>



Meeting ID: 845 619 943

Password: 016104



Next-Generation Microelectronic Packaging: Opportunities and Challenges – A Reliability Perspective


Suresh K. Sitaraman

                                 Regents’ Professor and Morris M. Bryan, Jr. Professor
The George W. Woodruff School of Mechanical Engineering
Georgia Institute of Technology

Abstract: Microelectronic packaging continues to evolve with new designs, materials, processes, and testing protocols for automotive, aerospace, communication, consumer, medical, defense, and other applications.  Some of these applications require resilient electronics for rugged and harsh environmental conditions, while several others require electronics for moderate and benign environmental conditions.  When increased performance, functionality, and power requirements are combined with reduced size, weight, and cost, reliability and testing challenges arise. In this presentation, I will highlight some of the reliability challenges and opportunities for “rigid” microelectronic systems involving 2.5D and 3D packaging with heterogeneous integration. In particular, I will focus on through-silicon vias, interfacial debonding, field-specific mapping, and solder-joint fatigue. I will conclude the talk discussing the flexible and wearable electronic systems which are amenable to bend, stretch, twist, or fold to adapt to sculptured surfaces, and how the reliability assessment and accelerated test protocols, established for rigid electronics, need to be examined for flexible and wearable electronics.


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Short Bio: Dr. Suresh K. Sitaraman is a Regents’ Professor and a Morris M. Bryan, Jr. endowed Professor in the George W. Woodruff School of Mechanical Engineering at the Georgia Institute of Technology (Georgia Tech). Dr. Sitaraman is the Lead Faculty for NextFlex at Georgia Tech, and also directs the Computer-Aided Simulation of Packaging Reliability (CASPaR) Lab. His expertise is in the areas of micro- and nano-scale structure fabrication, testing and characterization and physics-based modeling and reliable design, as applied to flexible and rigid microsystems. Prior to joining Georgia Tech in 1995, Dr. Sitaraman was with IBM Corp. Dr. Sitaraman has co-authored more than 300 journal and conference publications over the past few years. He has managed several research and development projects funded by US federal agencies, industry, and other sources totaling millions of dollars, and has mentored a vast array of post-doctoral fellows as well as doctoral, master’s, bachelor’s, and high-school students.

Dr. Sitaraman’s work has been recognized through several awards and honors. Among them, he has received the Zeigler Outstanding Educator Award from Georgia Tech/Mechanical Engineering in 2019, the NextFlex Fellow recognition in 2018, the Outstanding Achievement in Research Program Development Award (Team Leader) from Georgia Tech in 2017, the ASME/EPPD (Electronic and Photonic Packaging Division) Applied Mechanics Award in 2012 and the Thomas French Achievement Award from the Department of Mechanical and Aerospace Engineering, The Ohio State University in 2012. Dr. Sitaraman has received the Sustained Research Award from Georgia Tech – Sigma Xi in 2008 and the Outstanding Faculty Leadership Award for the Development of Graduate Research Assistants, Georgia Tech in 2006. His co-authored papers have won the Commendable Paper Award from IEEE Transactions on Advanced Packaging in 2004 and the Best Paper Award from IEEE Transactions on Components and Packaging Technologies in 2001 and 2000. Dr. Sitaraman has also received the Metro-Atlanta Engineer of the Year in Education Award in 1999 and the NSF-CAREER Award in 1997. Dr. Sitaraman serves as an Associate Editor for IEEE Transactions on Components, Packaging, and Manufacturing Technology. Dr. Sitaraman is an ASME Fellow.



Please contact Dr. <mailto:yyao4 at uh.edu> Cunjiang Yu <cyu13 at Central.UH.EDU> or Jiming Bao (jbao at uh.edu) if you want to meet with the speaker.


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