[CCoE Notice] MS Thesis Presentation

[Abercrombie, Irene F]

MS Thesis Defense
Interval Bisection Quantization Circuit for an 8-bit Analog to Digital Converter
Colin Taylor
Date: Monday, November 12th, 2012

Location: ECE Conference Room
Time: 2:30 pm

Committee Chair:
Dr. E.J. Charlson

Committee Members:
Dr. Wanda Wosik
Dr. Rajeev Pillai


A common type of analog to digital converter (ADC) is called the successive approximation ADC.  It works by setting each bit in the digital output code individually and thus its conversion time is determined by the clock frequency and the resolution of the converter.  A speed improvement may be made by using a quantization circuit that sets the entire output code at once.  The goal of this project is to design such a quantization circuit based on the interval bisection algorithm.  The circuit was designed using Cadence Schematic and Virtuoso and was simulated using spice.  Spice simulations show that, on average, the circuit converts faster than the conventional successive approximation converter.




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